NASCENT Friday Seminar

Thrust Project

P-1E:WS Nanofabrication of Advanced CMOS Memory Devices

Sub-project numbers

Project Title

Primary Student(s) or Postdoc(s)

Supervising professor(s)

P-1E.5-T-A

Wafer-scale Selective ALD

Xin Yang

John Ekerdt

P-1E.6-T-A

ALD of Metals for STT Applications

Himmi Nallan

John Ekerdt

P-1F: WS Nanofabrication of Advanced CMOS Logic Devices

P-1F.6-T

Logic Circuit Design Based on sub-10 nm FinFET Transistors

Jacob Rohan

Jaydeep Kulkarni

P-2E: Computational Intelligence & Physical Analytics (CIPA) for Nanomanufacturing Performance Enhancement

P-2E.1-T-A

CIPA-based Real-Time Algorithms for Picoliter Volume, Reliable Inkjetting

Brent Snyder

S.V. Sreenivasan